Write an assembly program to convert an 8 bit BCD number to corresponding octal number. Lab 9 Write an assembly language to find the LCM of two numbers.
Pass the parameters to the procedure using registers, pointers and stack Write an assembly language to divide a 32 bit number by 16 nit number.
The program should handle the quotient size exceeds 16 bits. Lab 10 Convert 8 bit binary number to gray code. Convert temp From Fahrenheit to Celsius. Lab 11 Write an assembly language to handle the divide by zero interrupt. Write an assembly language to override the overflow interrupt. Write an assembly language program to find the factorial recursively and find the nCr. Write an assembly language to find the area of a circle.
Write an assembly language to find the side of a right angled triangle. Resources Readme. Releases No releases published. The clock signal supplied by is divided by three for internal use. The maximum internal clock frequency of is 5MHz. Write the special functions carried by the general purpose registers of The special functions carried by the registers of are the following.
CX Count Register. What is pipelined architecture? In pipelined architecture the processor will have number of functional units and the execution time of functional units are overlapped. Each functional unit works independently most of the time. What are the functional units available in architecture? The bus interface unit and execution unit are the two functional units available in architecture. List the segment registers of The segment registers of are Code segment, Data segment, Stack segment and Extra segment registers.
Define machine cycle. This cycle may consist of three to six T-states. Define T-State. T-State is defined as one subdivision of the operation performed in one clock period. These subdivisions are internal states synchronized with the system clock, and each T-State is precisely equal to one clock period.
List the components of microprocessor single board microcomputer based system. What is the difference between CPU bus and system bus? The CPU bus has multiplexed lines but the system bus has separate lines for each signal. What does memory-mapping mean? The memory mapping is the process of interfacing memories to microprocessor and allocating addresses to each memory locations.
If the monitor program is stored from this address then after a reset, it will be executed automatically. What is DMA? What is the need for Port? What is a port? Give some examples of port devices used in microprocessor based system? The ports can be programmed to function either as a input port or as a output port in different operating modes. It requires 4 internal addresses and has one logic LOW chip select pin. Hence memory mapping is useful only for small systems, where the memory requirement is less.
How DMA is initiated? When the processor receives a HOLD request, it will drive its tri-stated pins to high impedance state at the end of current instruction execution and send an acknowledge signal to DMA controller.
What is processor cycle Machine cycle? The processor cycle or machine cycle is the basic operation performed by the processor. To execute an instruction, the processor will run one or more machine cycles in a particular order.
What is Instruction cycle? The sequence of operations that a processor has to carry out while executing the instruction is called Instruction cycle. Each instruction cycle of a processor indium consists of a number of machine cycles.
What is fetch and execute cycle? In general, the instruction cycle of an instruction can be divided into. The fetch cycle is executed to fetch the opcode from memory. The execute cycle is executed to decode the. In Block transfer mode, the DMA controller will transfer a block of data and relieve the bus for processor.
After sometime another block of data is transferred by DMA and so on. In Demand transfer mode the DMA controller will complete the entire. What is the need for timing diagram?
The timing diagram provides information regarding the status of various signals, when a machine cycle is executed. The knowledge of timing diagram is essential for system designer to select matched peripheral devices like memories, latches, ports, etc. How many machine cycles constitute one instruction cycle in ?
Each instruction of the processor consists of one to five machine cycles. Define opcode and operand. What is opcode fetch cycle?
The opcode fetch cycle is a machine cycle executed to fetch the opcode of an instruction stored in memory. Every instruction starts with opcode fetch machine cycle. What operation is performed during first T -state of every machine cycle in ? In , during the first T -state of every machine cycle the low byte address is latched into an external latch using ALE signal.
Why status signals are provided in microprocessor? The status signals can be used by the system designer to track the internal operations of the processor. When the processor checks for an interrupt? In the second T -state of the last machine cycle of every instruction, the processor checks whether an interrupt request is made or not. What is interrupt acknowledge cycle? The interrupt acknowledge cycle is a machine cycle executed by processor to get the address of the interrupt service routine in-order to service the interrupt device.
How the interrupts are affected by system reset? Whenever the processor or system is resetted , all the interrupts except TRAP are disabled. What is Software interrupts? The Software interrupts are program instructions.
These instructions are inserted at desired locations in a program. While running a program, if software interrupt instruction is encountered then the processor executes an interrupt service routine.
What is Hardware interrupt? If an interrupt is initiated in a processor by an appropriate signal at the interrupt pin, then the interrupt is called Hardware interrupt. What is Polling? Polling is a scheme or an algorithm to identify the devices interrupting the processor.
Polling is employed when multiple devices interrupt the processor through one interrupt pin of the processor. What are the different types of Polling? The polling can be classified into software and hardware polling. In software polling the entire polling process is govern by a prograrn. What is the need for interrupt controller? The interrupt controller is employed to expand the interrupt inputs.
It can handle the interrupt request from various devices and allow one by one to the processor. It manage eight interrupt request. The interrupt vector addresses are programmable. The priorities of interrupts are programmable.
The interrupt can be masked or unmasked individually. What is a programmable peripheral device? If the functions performed by a peripheral device can be altered or changed by a program instruction then the peripheral device is called programmable device.
Usually the programmable devices will have control registers. The device can be programmed by sending control word in the prescribed format to the control register. What is synchronous data transfer scheme? As a double word has 32 bits therefore bit AX register cannot store it. So, DX register will store the most significant bits of the numerator and least significant bits are in AX register.
After division AX will store quotient and DX will store remainder. This instruction is used before division of two unpacked BCD numbers so that after division, the quotient and remainder produced would be in unpacked BCD form. The AL becomes:. And AH is cleared to 0. After that division instruction is executed to generate quotient and remainder both in unpacked BCD forms.
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To generate square wave of given duty cycle using DAC To generate a triangular waveform using DAC To generate a staircase waveform using DAC To sense a keyboard To implement a moving display of a given string of digits To display a message on the display unit using chip To simulate throw of a dice 3.
Read initial values via key board data segment n db 01fh fib db 15 dup? Program to find trace of the matrix data segment matrix db 0ffh,0ffh,0ffh,0ffh,0ffh,0ffh,0ffh,0ffh,0ffh ;3x3row dw h ;no. Program to find average of n numbers.
Program to generate 10 Fibonacci numbers. Program to sort the number in ascending order using bubble sort. A student should be given only one question either from part-1 or from part-II for the examination. PART-I 1. Write an ALP to transfer given source string to destination using string instructions.
Write an ALP to generate 10 fibonacci numbers, Read initial values via keyboard. Write an Alp to generate prime numbers between 1 to 50 BCD.
Write an ALP to find a Sum of principal diagonal elements trace of a matrix b Norms of the matrix sum of the squares of the principal diagonal elements Develop and execute an ALP that implements binary search algorithm. Assume that the data consist of sorted bit integers. Search key is also a bit unsigned integer. Read all the 8 inputs from the logic controller.
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